An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes
2020 Okuhara, Hayate; Elnaqib, Ahmed; Rossi, Davide; Di Mauro, Alfio; Mayer, Philipp; Palestri, Pierpaolo; Benini, Luca
Efficient Quantum Mechanical Simulation of Band-to-band Tunneling
2015 Cem, Alper; Palestri, Pierpaolo; Jose L., Padilla; Antonio, Gnudi; Roberto, Grassi; Elena, Gnani; Mathieu, Luisier; Adrian M., Ionescu
Impact of Device Geometry of the Fin Electron-Hole Bilayer Tunnel FET
2016 Alper, C.; Padilla, J. L.; Palestri, Pierpaolo; Ionescu, A. M.
Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs
2017 Settino, F.; Strangio, S.; Lanuzza, M.; Crupi, F.; Palestri, P.; Esseni, D.
Two Dimensional Quantum Mechanical Simulation of Low Dimensional Tunneling Devices
2014 C., Alper; Palestri, Pierpaolo; L., Lattanzio; J. L., Padilla; A. M., Ionescu
A virtual III-V Tunnel FET technology platform for ultra-low voltage comparators and level shifters
2017 Settino, F.; Lanuzza, M.; Strangio, S.; Crupi, F.; Palestri, Pierpaolo; Esseni, David
Thermal Resistance in Si(1-x) Ge(x) HBTs on Bulk and SOI Substrates
2001 Palestri, Pierpaolo; A., Pacelli; M., Mastrapasqua
Design strategies for SOI FinFET Low-Noise Amplifiers: dealing with Flicker Noise
2009 Ponton, Davide; Palestri, Pierpaolo; Parvais, B; Fulde, M.
Drain Current Improvements in Uniaxially Strained p-MOSFETs: a Multi-Subband Monte Carlo Study
2008 Conzatti, Francesco; De Michielis, Marco; Esseni, David; Palestri, Pierpaolo
Physics-Based and Compact Models for Self-Heating in High-Speed Bipolar Integrated Circuits
2002 A., Pacelli; Palestri, Pierpaolo; M., Mastrapasqua
Device simulation for advenced Si(1-x) Ge(x) HBTs
2001 M., Mastrapasqua; A., Pacelli; Palestri, Pierpaolo; C. A., King
Modeling 1/f and Lorenzian noise in III-V MOSFETs
2019 Caruso, E.; Bettetti, F.; Del Linz, Leonida; Pin, D.; Segatto, M.; Palestri, P.
A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces
2019 Cortiula, A.; Dazzi, M.; Marcon, M.; Menin, D.; Scapol, M.; Bandiziol, A.; Cristofoli, A.; Grollitsch, W.; Nonis, R.; Palestri, P.
Modeling Low and High Field Uniform Transport in Monolayer MoS2
2021 Pilotto, Alessandro; Khakbaz, Pedram; Palestri, Pierpaolo; Esseni, David
Modeling the Imaginary Branch in III-V Tunneling Devices: Effective Mass vs k · p
2015 Alper, Cem; Visciarelli, Michele; Palestri, Pierpaolo; Padilla, Jose L.; Gnudi, Antonio; Gnani, Elena; Ionescu, Adrian M.
Experimental characterization of the Static Noise Margins of strained Silicon complementary Tunnel-FET SRAM
2017 Luong, G. V.; Strangio, Sebastiano; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, Pierpaolo; Mantl, S.; Zhao, Q. T.
New Hot Carrier degradation modeling reconsidering the role of EES in ultra short N-channel MOSFETs
2013 Randriamihaja, Y; Federspiel, X; Huard, V; Bravaix, A; Palestri, Pierpaolo
Comparison of BULK and Ultra-Thin Double Gate SOI MOSFETs for the 65 nm Technology Node: A Monte Carlo Study
2005 M., Braccioli; S., Eminente; Palestri, Pierpaolo; Esseni, David; C., Fiegna
ACCURATE REDUCED-ORDER MODELLING OF PLATE-FIN HEAT EXCHANGERS
2023 Grespan, Mattia; Leonforte, Adriano; Cavazzuti, Marco; Calò, Luigi; Angeli, Diego
Insights into host-target interaction from the proteome modulation analysis through untargeted LC-MS/MS Proteomics of drug resistant L infantum-THP1 infected cells
2023 Tagliazucchi, Lorenzo; Malpezzi, Giulia; Perea Martinez, Ana; Ignacio Manzano, José; Garcia-Hernandez, Raquel; Pinetti, Diego; Genovese, Filippo; Thorè, Eli; Brooks, Bryan W.; Bertram, Michael G.; Gamarro, Francisco; Costi, Maria Paola
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes | 1-gen-2020 | Okuhara, Hayate; Elnaqib, Ahmed; Rossi, Davide; Di Mauro, Alfio; Mayer, Philipp; Palestri, Pierpaolo; Benini, Luca | |
| Efficient Quantum Mechanical Simulation of Band-to-band Tunneling | 1-gen-2015 | Cem, Alper; Palestri, Pierpaolo; Jose L., Padilla; Antonio, Gnudi; Roberto, Grassi; Elena, Gnani; Mathieu, Luisier; Adrian M., Ionescu | |
| Impact of Device Geometry of the Fin Electron-Hole Bilayer Tunnel FET | 1-gen-2016 | Alper, C.; Padilla, J. L.; Palestri, Pierpaolo; Ionescu, A. M. | |
| Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs | 1-gen-2017 | Settino, F.; Strangio, S.; Lanuzza, M.; Crupi, F.; Palestri, P.; Esseni, D. | |
| Two Dimensional Quantum Mechanical Simulation of Low Dimensional Tunneling Devices | 1-gen-2014 | C., Alper; Palestri, Pierpaolo; L., Lattanzio; J. L., Padilla; A. M., Ionescu | |
| A virtual III-V Tunnel FET technology platform for ultra-low voltage comparators and level shifters | 1-gen-2017 | Settino, F.; Lanuzza, M.; Strangio, S.; Crupi, F.; Palestri, Pierpaolo; Esseni, David | |
| Thermal Resistance in Si(1-x) Ge(x) HBTs on Bulk and SOI Substrates | 1-gen-2001 | Palestri, Pierpaolo; A., Pacelli; M., Mastrapasqua | |
| Design strategies for SOI FinFET Low-Noise Amplifiers: dealing with Flicker Noise | 1-gen-2009 | Ponton, Davide; Palestri, Pierpaolo; Parvais, B; Fulde, M. | |
| Drain Current Improvements in Uniaxially Strained p-MOSFETs: a Multi-Subband Monte Carlo Study | 1-gen-2008 | Conzatti, Francesco; De Michielis, Marco; Esseni, David; Palestri, Pierpaolo | |
| Physics-Based and Compact Models for Self-Heating in High-Speed Bipolar Integrated Circuits | 1-gen-2002 | A., Pacelli; Palestri, Pierpaolo; M., Mastrapasqua | |
| Device simulation for advenced Si(1-x) Ge(x) HBTs | 1-gen-2001 | M., Mastrapasqua; A., Pacelli; Palestri, Pierpaolo; C. A., King | |
| Modeling 1/f and Lorenzian noise in III-V MOSFETs | 1-gen-2019 | Caruso, E.; Bettetti, F.; Del Linz, Leonida; Pin, D.; Segatto, M.; Palestri, P. | |
| A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces | 1-gen-2019 | Cortiula, A.; Dazzi, M.; Marcon, M.; Menin, D.; Scapol, M.; Bandiziol, A.; Cristofoli, A.; Grollitsch, W.; Nonis, R.; Palestri, P. | |
| Modeling Low and High Field Uniform Transport in Monolayer MoS2 | 1-gen-2021 | Pilotto, Alessandro; Khakbaz, Pedram; Palestri, Pierpaolo; Esseni, David | |
| Modeling the Imaginary Branch in III-V Tunneling Devices: Effective Mass vs k · p | 1-gen-2015 | Alper, Cem; Visciarelli, Michele; Palestri, Pierpaolo; Padilla, Jose L.; Gnudi, Antonio; Gnani, Elena; Ionescu, Adrian M. | |
| Experimental characterization of the Static Noise Margins of strained Silicon complementary Tunnel-FET SRAM | 1-gen-2017 | Luong, G. V.; Strangio, Sebastiano; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, Pierpaolo; Mantl, S.; Zhao, Q. T. | |
| New Hot Carrier degradation modeling reconsidering the role of EES in ultra short N-channel MOSFETs | 1-gen-2013 | Randriamihaja, Y; Federspiel, X; Huard, V; Bravaix, A; Palestri, Pierpaolo | |
| Comparison of BULK and Ultra-Thin Double Gate SOI MOSFETs for the 65 nm Technology Node: A Monte Carlo Study | 1-gen-2005 | M., Braccioli; S., Eminente; Palestri, Pierpaolo; Esseni, David; C., Fiegna | |
| ACCURATE REDUCED-ORDER MODELLING OF PLATE-FIN HEAT EXCHANGERS | 1-gen-2023 | Grespan, Mattia; Leonforte, Adriano; Cavazzuti, Marco; Calò, Luigi; Angeli, Diego | |
| Insights into host-target interaction from the proteome modulation analysis through untargeted LC-MS/MS Proteomics of drug resistant L infantum-THP1 infected cells | 1-gen-2023 | Tagliazucchi, Lorenzo; Malpezzi, Giulia; Perea Martinez, Ana; Ignacio Manzano, José; Garcia-Hernandez, Raquel; Pinetti, Diego; Genovese, Filippo; Thorè, Eli; Brooks, Bryan W.; Bertram, Michael G.; Gamarro, Francisco; Costi, Maria Paola |
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